Beirut · 2015 to 2019
Where it starts
I studied Electrical and Computer Engineering at the American University of Beirut. There I learnt my problem-solving skills, and I felt passionate about the social good I could do through my knowledge and skills.
- BEng, High Distinction
- American University of Beirut
Montreal · 2019 to 2021
Home away from home
I came to McGill to pursue a master's in Prof. Warren Gross's Integrated Systems for Information Processing Lab.
- Master's Degree
- GRAND
McGill · 2020 to now
Passing it on
Since 2020 I have run labs and tutorials for Computer Organization, Digital Systems and Digital Logic, where students write ARM assembly and build circuits on FPGA boards. Across 370 course evaluations, students rate my help with the material at 4.2 out of 5.
Teaching evaluationsPhD · 2021 to 2022
Doctor of Philosophy
I then decided to pursue a PhD. I felt like my master's work was unfinished. I felt like I could make more advancements in knowledge in the field.
- PhD
Play
Decoder playground
Pick decoders and a code to compare frame error rate against area, throughput and energy, scaled to a common technology node.
Add simulated curves (), grouped by code
Metrics and scaling rules
For a design with throughput \(T\) (Gb/s), area \(A\) (mm²) and power \(P\) (mW), built in node \(n_1\) at supply \(V_1\):
$$\mathrm{AE} = \frac{T}{A}\ \left[\tfrac{\mathrm{Gb/s}}{\mathrm{mm}^2}\right], \qquad \mathrm{EE} = \frac{P}{T}\ \left[\tfrac{\mathrm{pJ}}{\mathrm{bit}}\right]$$Scaling to node \(n_2\) and supply \(V_2\) uses the area and energy factors
$$S_A = \left(\frac{n_2}{n_1}\right)^{2}, \qquad S_E = \left(\frac{V_2}{V_1}\right)^{2}\left(\frac{n_2}{n_1}\right)^{2}$$so that
$$A' = S_A\,A, \qquad \mathrm{AE}' = \frac{\mathrm{AE}}{S_A}, \qquad \mathrm{EE}' = S_E\,\mathrm{EE}, \qquad P' = S_E\,P, \qquad T' = T.$$Throughput is not scaled. Energy needs \(V_1\), so designs without a reported supply voltage drop out of energy and power plots while scaling is on. These are first-order CMOS rules (C.-H. Lin et al., IEEE TCAS-I, 2009). Treat scaled values as rough estimates.
Diamonds have a full FER curve. When only the Eb/N0 at FER = 10-5 is known, it is drawn as a cross. Each selected design gets a card under the plots with its full details and notes, and the last column of the table holds the notes too (click a note to expand it). The page address keeps your selection, so you can share a comparison.
Read
Selected papers
Lately
News
| Nov 04, 2025 | US patent granted: “Polar decoder and associated method” (US 12,463,747 B2), an optimization-based polar decoder developed with Huayi Zhou, Ryan Seah, and Warren J. Gross. |
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| Jun 01, 2025 | Paper accepted at ICC 2025: “Hardware-friendly IR-HARQ for Polar SCL Decoders” |
| Sep 15, 2024 | Published in IEEE TCOMM: “Reduced-Complexity Projection-Aggregation List Decoder for Reed-Muller Codes” |
| Jul 01, 2024 | Published in IEEE JSAC: “Decoding of Polar Codes Using Quadratic Unconstrained Binary Optimization” |